•Integrates on-chip USB 3.0 PHY and controller compliant to USB Spec 3.0,2.0 and 1.1
•Supports all USB 3.0 power saving modes (U0, U1, U2, and U3)
•Supports USB Super/High/Full Speed modes with Bus-power or Self-power device auto-detect capability
•Supports IEEE 802.3az (Energy Efficient Ethernet
•Supports parallel detection and automatic polarity correction
•Supports IPv4/IPv6 packet Checksum Offload Engine (COE) to reduce CPU loading
•Supports TCP Large Send Offload V1
•Supports full duplex operation with IEEE 802.3x flow control and half duplex operation with back-pressure flow control
•Supports IEEE 802.1P Layer 2 Priority Encodingand Decoding
•Supports Jumbo frame PHY loop-back diagnostic capability
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